HP Moonshot 1500 Chassis User Manual Page 97

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System power cycle
Pre-timeout interrupt (optional)
The system reset on timeout, system power off on timeout, and system power cycle on timeout
action selections are mutually exclusive. The watchdog timer is stopped whenever the system is
powered-down. A command must be sent to start the timer after the system powers up.
Watchdog timer use field and expiration flags
The watchdog timer provides a timer use field that indicates the current use assigned to the watchdog
timer. The watchdog timer provides a corresponding set of timer use expiration flags that are used
to track the type of timeout that had occurred.
The timeout use expiration flags retain their state across system resets and power cycles, as long
as the MC remains powered. The flags are normally cleared solely by the set watchdog timer
command; with the exception of the don’t log flag, which is cleared after every system hard reset
or timer timeout.
The timer use fields indicate:
DescriptionTimer use field
An FRB-2 (fault-resilient booting, level 2) timeout has occurred indicating that the
last system reset or power cycle was due to the system timeout during POST,
presumed to be caused by a failure or hang related to the bootstrap processor.
1
BIOS FRB2 timeout
In this mode, the timeout occurred while the watchdog timer was being used by
the BIOS for some purpose other than FRB-2 or OS load watchdog.
BIOS POST timeout
The last reset or power cycle was caused by the timer being used to watchdog
the interval from boot to OS up and running. This mode requires system
OS load timeout
management software, or OS support. BIOS should clear this flag if it starts this
timer during POST.
Indicates that the timer was being used by SMS. During run-time, SMS starts the
timer, then periodically resets it to keep it from expiring. This periodic action
SMS OS watchdog timeout
serves as a heartbeat that indicates that the OS (or at least the SMS task) is still
functioning. If SMS hangs, the timer expires and the MC generates a system
reset. When SMS enables the timer, it should make sure the SMS bit is set to
indicate that the timer is being used in its OS watchdog role.
Indicates that the timer was being used for an OEM-specific function.OEM
1
In a multiprocessor system, the bootstrap processor is defined as the processor that, on system power-up or hard reset,
is allowed to run and execute system initialization (BIOS POST) while the remaining processors are held in an idle state
awaiting startup by the multiprocessing OS.
Using the timer use field and expiration flags
The software that sets the timer use field is responsible for managing the associated timer use
expiration flag. For example, if SMS sets the timer use to SMS/OS watchdog, then that same SMS
is responsible for acting on and clearing the associated timer use expiration flag.
In addition, software should only interpret or manage the expiration flags for watchdog timer uses
that it set. For example, BIOS should not report watchdog timer expirations or clear the expiration
flags for non-BIOS uses of the timer. This is to allow the software that did set the timer use to see
that a matching expiration occurred.
Watchdog timer event logging
By default, the MC automatically logs the corresponding sensor-specific watchdog sensor event
when a timer expiration occurs. A don’t log bit is provided to temporarily disable the automatic
logging. The don’t log bit is automatically cleared (logging re-enabled) whenever a timer expiration
occurs.
Standard command specification 97
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