HP KC.32101.DMP Datasheet Page 4

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4 Datasheet, Volume 1
2.3.3 DMI Link Down.......................................................................................32
2.4 Processor Graphics Controller (GT).......................................................................32
2.4.1 3D and Video Engines for Graphics Processing ............................................33
2.4.1.1 3D Engine Execution Units..........................................................33
2.4.1.2 3D Pipeline...............................................................................34
2.4.1.3 Video Engine ............................................................................34
2.4.1.4 2D Engine ................................................................................35
2.4.2 Processor Graphics Display ......................................................................36
2.4.2.1 Display Planes ..........................................................................36
2.4.2.2 Display Pipes ............................................................................37
2.4.2.3 Display Ports ............................................................................37
2.4.2.4 Embedded DisplayPort (eDP) ......................................................37
2.4.3 Intel
®
Flexible Display Interface ...............................................................37
2.4.4 Multi Graphics Controllers Multi-Monitor Support .........................................38
2.5 Platform Environment Control Interface (PECI) ......................................................38
2.6 Interface Clocking..............................................................................................38
2.6.1 Internal Clocking Requirements ................................................................38
3 Technologies............................................................................................................39
3.1 Intel
®
Virtualization Technology ..........................................................................39
3.1.1 Intel
®
VT-x Objectives ............................................................................39
3.1.2 Intel
®
VT-x Features...............................................................................40
3.1.3 Intel
®
VT-d Objectives ............................................................................40
3.1.4 Intel
®
VT-d Features...............................................................................40
3.1.5 Intel
®
VT-d Features Not Supported..........................................................41
3.2 Intel
®
Trusted Execution Technology (Intel
®
TXT) .................................................41
3.3 Intel
®
Hyper-Threading Technology .....................................................................42
3.4 Intel
®
Turbo Boost Technology ............................................................................42
3.4.1 Intel
®
Turbo Boost Technology Frequency...................................................43
3.4.2 Intel
®
Turbo Boost Technology Graphics Frequency.....................................43
3.5 Intel
®
Advanced Vector Extensions (AVX) .............................................................44
3.6 Security and Cryptography Technologies...............................................................44
3.6.1 Advanced Encryption Standard New Instructions (AES-NI) ...........................44
3.6.2 PCLMULQDQ Instruction ..........................................................................44
3.6.3 RDRAND Instruction................................................................................45
3.7 Intel
®
64 Architecture x2APIC .............................................................................45
3.8 Supervisor Mode Execution Protection (SMEP) .......................................................46
3.9 Power Aware Interrupt Routing (PAIR)..................................................................46
4 Power Management .................................................................................................47
4.1 ACPI States Supported .......................................................................................48
4.1.1 System States........................................................................................48
4.1.2 Processor Core/Package Idle States...........................................................48
4.1.3 Integrated Memory Controller States.........................................................48
4.1.4 PCI Express* Link States .........................................................................49
4.1.5 DMI States ............................................................................................49
4.1.6 Processor Graphics Controller States .........................................................49
4.1.7 Interface State Combinations ...................................................................49
4.2 Processor Core Power Management ......................................................................50
4.2.1 Enhanced Intel
®
SpeedStep
®
Technology ..................................................50
4.2.2 Low-Power Idle States.............................................................................51
4.2.3 Requesting Low-Power Idle States ............................................................52
4.2.4 Core C-states .........................................................................................53
4.2.4.1 Core C0 State ...........................................................................53
4.2.4.2 Core C1/C1E State ....................................................................53
4.2.4.3 Core C3 State ...........................................................................53
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