HP KC.32101.DMP Datasheet download pdf (Page 104)

Electrical Specifications

104 Datasheet, Volume 1

Notes:

1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2. V

is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low

value.

3. V

is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high

value.

4. V

and V

may experience excursions above V

DDQ

. However, input signal drivers must comply with the

signal quality specifications.

5. This is the pull-up/pull-down driver resistance.

6. R

TERM

is the termination on the DIMM and in not controlled by the processor.

7. The minimum and maximum values for these signals are programmable by BIOS to one of the two sets.

8. SM_RCOMPx resistance must be provided on the system board with 1% resistors. SM_RCOMPx resistors

are to V

9. SM_DRAMPWROK must have a maximum of 15 ns rise or fall time over V

DDQ

* 0.55± 200 mV and the

edge must be monotonic.

10. SM_VREF is defined as V

DDQ

/2.

11. R

tolerance is preliminary and might be subject to change.

Notes:

1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2. The V

CCIO

referred to in these specifications refers to instantaneous V

CCIO

3. For V

between “0” V and V

CCIO

. Measured when the driver is tristated.

4. V

and V

may experience excursions above V

CCIO

. However, input signal drivers must comply with the

signal quality specifications.

Input Leakage

Current (DQ, CK)

0.2*V

DDQ

0.8*V

DDQ

——

± 0.75

± 0.55

± 0.9

± 1.4

Input Leakage

Current (CMD, CTL)

0.2*V

DDQ

0.8*V

DDQ

——

± 0.85

± 0.65

± 1.10

± 1.65

SM_RCOMP0

Command COMP

Resistance

138.6 140 141.4 Ω 8

SM_RCOMP1

Data COMP

Resistance

25.245 25.5 25.755 Ω 8

SM_RCOMP2

ODT COMP

Resistance

198 200 202 Ω 8

Table 7-11. DDR3/DDR3L/DDR3L-RS Signal Group DC Specifications (Sheet 2 of 2)

Symbol Parameter Min Typ Max Units Notes

Table 7-12. Control Sideband and TAP Signal Group DC Specifications

Symbol Parameter Min Max Units Notes

Input Low Voltage — V

CCIO

* 0.3 V 2

Input High Voltage V

CCIO

* 0.7 — V 2, 4

Output Low Voltage — V

CCIO

* 0.1 V 2

Output High Voltage V

CCIO

* 0.9 — V 2, 4

Buffer on Resistance 23 73 Ω

Input Leakage Current — ±200 μA3

1 2 ... 99 100 101 102 103 104 105 106 107 108 109 ... 167 168

Comments to this Manuals

No comments

HP KC.32101.DMP Datasheet Page 104

Comments to this Manuals

Related products and manuals for Processors HP KC.32101.DMP