HP Integrity rx2600 Specifications download pdf (Page 22)

Architectural overview of the HP Integrity rx4640 server

The HP Integrity rx4640 server supports one, two, three, or four Intel Itanium 2 processors linked to the zx1 memory

and I/O controller through a 200 MHz, double-pumped 128-bit system bus. Total bandwidth on the system bus is 6.4

GB/s.

Figure 12. The HP Integrity rx4640 server supports up to four Intel Itanium 2 processors linked to the HP zx1 Chipset

The zx1 Chipset memory controller links to two independent 200 MHz, 6.4 GB/s memory buses. Each bus

connects to three zx1 scalable memory expanders, which in turn allocate bandwidth to the DDR DRAM memory

DIMMs. Total DIMM capacity is either 16 or 32 units on a single memory carrier board.

The I/O architecture consists of eight 0.5 GB/s channels allocated among six zx1 Chipset I/O adapters. Each of

these six adapters provides a PCI-X or PCI bus to the available I/O slots and core I/O devices. The first two I/O

channels connect to an independent 133 MHz PCI-X I/O slot with 1.0 GB/s of sustained throughput. The next two

I/O channels connect to an identical 133 MHz PCI-X slot. Two more I/O channels connect to a pair of zx1

Chipset I/O adapters, each of which in turn connects to a pair of 66 MHz PCI-X I/O slots. Each slot-pair shares

0.5 GB/s of bandwidth.

The final two I/O channels connect to the core I/O. One channel provides 0.5 GB/s of bandwidth to the core

10/100/1000BT LAN as well as to the dual-channel Ultra160 SCSI controller. The other channel provides

0.5 GB/s of bandwidth to the core management LAN, RS-232 serial ports, USB ports, and VGA.

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HP Integrity rx2600 Specifications Page 22