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Technical Reference Guide www.hp.com 4-9
System Support
4.4 Real-Time Clock and Configuration Memory
The Real-time clock (RTC) and configuration memory (also referred to as “CMOS”) functions
are provided by the 82801 component and is MC146818-compatible. As shown in the following
figure, the 82801 ICH9 component provides 256 bytes of battery-backed RAM divided into two
128-byte configuration memory areas. The RTC uses the first 14 bytes (00-0Dh) of the standard
memory area. All locations of the standard memory area (00-7Fh) can be directly accessed using
conventional OUT and IN assembly language instructions through I/O ports 70h/71h, although
the suggested method is to use the INT15 AX=E823h BIOS call.
Figure 4 4. Configuration Memory Map
A lithium 3-VDC battery is used for maintaining the RTC and configuration memory while the
system is powered down. During system operation a wire-Ored circuit allows the RTC and
configuration memory to draw power from the power supply. The battery is located in a battery
holder on the system board and has a life expectancy of three or more years. When the battery
has expired it is replaced with a CR2032 or equivalent 3-VDC lithium battery.
4.4.1 Clearing CMOS
The contents of configuration memory (including the Power-On Password) can be cleared by the
following procedure:
1. Turn off the unit.
2. Disconnect the AC power cord from the outlet and/or system unit.
3. Remove the chassis hood (cover) and insure that no LEDs on the system board are
illuminated.
4. On the system board, press and hold the CMOS clear button (switch SW50, colored yellow)
for at least 5 seconds.
5. Replace the chassis hood (cover).
6. Reconnect the AC power cord to the outlet and/or system unit.
7. Turn the unit on.
To clear only the Power-On Password refer to section 4.5.1.
RTC Area
(14 bytes)
Standard Config.
Memory Area
(114 bytes)
Extended Config.
Memory Area
(128 bytes)
00h
0Dh
0Eh
80h
FFh
7Fh
Seconds (Timer)
Minutes (Timer)
Seconds (Alarm)
Hours (Alarm)
Hours (Timer)
Minutes (Alarm)
Day of Week
Date of Month
Month
Year
Register A
Register B
Register C
Register D
00h
0Bh
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Dh
0Ch
82801
CMOS
- Technical Reference Guide 1
- First Edition (October 2007) 2
- Contents 3
- 3 Processor/Memory Subsystem 4
- 4 System Support 4
- 5 Input/Output Interfaces 4
- 8SYSTEM BIOS 6
- A Error Messages and Codes 6
- Introduction 7
- 1.5 Notational Conventions 9
- Table 1-1 10
- Table 1-1 (Continued) 11
- System Overview 17
- 2.2 Features 18
- Table 2-1 19
- 2.3 System Architecture 20
- 2.3.1 Intel Processor Support 22
- 2.3.2 Chipset 23
- 2.3.3 Support Components 24
- 2.3.4 System Memory 24
- 2.3.5 Mass Storage 25
- 2.3.9 Graphics Subsystem 26
- 2.3.10 Audio Subsystem 26
- 2.4 Specifications 27
- Table 2-8 28
- Physical Specifications 28
- Table 2-9 29
- Table 2-10 30
- Optical Drive Specifications 30
- Table 2-11 31
- Hard Drive Specifications 31
- Processor/Memory Subsystem 33
- 3.2 Intel Processors 34
- 3.3 Memory Subsystem 36
- 3.3.1 Memory Upgrading 37
- System Support 39
- Software/Driver Layer 41
- Transaction Protocol Layer 41
- 4.2.3 Option ROM Mapping 42
- 4.2.4 PCI Interrupts 42
- 4.2.6 PCI Connectors 43
- PCI Express Connectors 44
- 4.3 System Resources 45
- 4.3.2 Direct Memory Access 46
- 4.4.1 Clearing CMOS 47
- 4.5 System Management 48
- Power-On / Setup Password 49
- Setup Password 49
- Cable Lock Provision 49
- I/O Interface Security 49
- Chassis Security 49
- 4.5.2 Power Management 50
- 4.5.3 System Status 51
- 4.6.1 System I/O Map 52
- 4.6.2 GPIO Functions 53
- I/O Controller Functions 54
- Input/Output Interfaces 55
- 5.2 SATA Interface 56
- 5.3 PATA Interface 57
- 5.4 Diskette Drive Interface 58
- Table 5-3 59
- 5.5 Serial Interface 60
- 5.6 Parallel Interface 61
- Table 5-5 62
- Table 5-6 64
- 5.8.1 USB Connector 65
- 5.8.2 USB Cable Data 66
- 5.9 Audio Subsystem 67
- 5.9.1 HD Audio Controller 68
- 5.9.2 HD Audio Link Bus 68
- 5.9.3 Audio Multistreaming 68
- 5.9.4 Audio Specifications 69
- 5.10.1 Wake-On-LAN Support 71
- 5.10.4 NIC Connector 72
- 5.10.5 NIC Specifications 72
- Integrated Graphics Subsystem 73
- 6.2 Functional Description 74
- Controller 74
- 6.3 Display Modes 76
- 6.4 Upgrading 77
- 6.5 Monitor Connectors 78
- Table 6-4 79
- Power and Signal Distribution 81
- 7.2.2 SFF Power Distribution 82
- Table 7-2 83
- 7.2.3 CMT Power Distribution 84
- 7.2.4 Energy Star Compliancy 85
- 7.3 Power Con trol 86
- Table 7-5 87
- Power Button Actions 87
- Power LED Condition 87
- 7.3.2 Wake Up Events 88
- 7.3.3 Power Management 89
- 7.4 Signal Distribution 90
- Table 7-7. (Continued) 91
- SYSTEM BIOS 93
- 8.2 ROM Flashing 94
- 8.3 Boot Functions 95
- 8.3.4 Boot Error Codes 96
- Table 8-2 97
- 8.4.1 System ID and ROM Type 98
- 8.4.2 Temperature Status 98
- 8.4.3 Drive Fault Prediction 98
- 8.5 SMBIOS 99
- 8.6 USB Legacy Support 100
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